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REF192 Datasheet(PDF) 17 Page - Analog Devices |
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REF192 Datasheet(HTML) 17 Page - Analog Devices |
17 / 24 page ![]() REV. E REF19x Series –17– 35 0 0.9 15 5 0.1 10 0 30 20 25 0.8 0.7 0.6 0.5 0.4 0.3 0.2 REF195 DROPOUT VOLTAGE – V TPC 13. Dropout Voltage vs. Load Current 10 100 0% 90 5V 200mV 200 s TPC 12. Line Transient Response +V VOUT SLEEP (SHUTDOWN) GND Figure 1. Simplified Schematic APPLICATIONS SECTION Output Short Circuit Behavior The REF19x family of devices is totally protected from damage due to accidental output shorts to GND or to V+. In the event of an accidental short circuit condition, the reference device will shut down and limit its supply current to 40 mA. Device Power Dissipation Considerations The REF19x family of references is capable of delivering load currents to 30 mA with an input voltage that ranges from 3.3 V to 15 V. When these devices are used in applications with large input voltages, care should be exercised to avoid exceeding these devices’ maximum internal power dissipation. Exceeding the published specifications for maximum power dissipation or junction temperature could result in premature device failure. The following formula should be used to calculate a device’s maximum junction temperature or dissipation: P T– T D A A = J J θ In this equation, TJ and TA are the junction and ambient tempera- tures, respectively, PD is the device power dissipation, and θJA is the device package thermal resistance. Output Voltage Bypassing For stable operation, low dropout voltage regulators and refer- ences generally require a bypass capacitor connected from their VOUT pins to their GND pins. Although the REF19x family of references is capable of stable operation with capacitive loads exceeding 100 µF, a 1 µF capacitor is sufficient to guarantee rated performance. The addition of a 0.1 µF ceramic capacitor in parallel with the bypass capacitor will improve load current transient performance. For best line voltage transient performance, it is recommended that the voltage inputs of these devices be bypassed with a 10 µF electrolytic capacitor in parallel with a 0.1 µF ceramic capacitor. Sleep Mode Operation All REF19x devices include a sleep capability that is TTL/CMOS level compatible. Internally, a pull-up current source to VIN is connected at the SLEEP pin. This permits the SLEEP pin to be driven from an open collector/drain driver. A logic LOW or a 0 V condition on the SLEEP pin is required to turn the output stage OFF. During sleep, the output of the references becomes a high impedance state where its potential would then be determined by external circuitry. If the sleep feature is not used, it is recom- mended that the SLEEP pin be connected to V IN (Pin 2). Basic Voltage Reference Connections The circuit in Figure 2 illustrates the basic configuration for the REF19x family of references. Note the 10 µF/0.1 µF bypass net- work on the input and the 1 µF/0.1 µF bypass network on the output. It is recommended that no connections be made to Pins 1, 5, 7, and 8. If the sleep feature is not required, Pin 3 should be connected to VIN. NC NC VIN SLEEP 1 2 3 4 8 7 6 5 NC NC 1 F TANT OUTPUT 0.1 F 10 F 0.1 F REF19x NC = NO CONNECT Figure 2. Basic Voltage Reference Configuration |
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