NXP Semiconductors

FS8600_SDS

Fail-safe system basis chip with multiple SMPSs and LDOs

9 Electrostatic discharge

9.1 Human body model (JESD22/A114)

The device is protected up to ±2 kV, according to the human body model standard with

100 pF and 1.5 kΩ. This protection is ensured at all pins.

9.2 Charged device model

The device is protected up to ±750 V on corner pins and up to ±500 V on all other pins,

according to the AEC Q100 - 011 charged device model standard.

9.3 Discharged contact test

The device is protected up to ±8 kV, according to the following discharged contact tests.

• Discharged contact test (IEC61000-4-2) at 150 pF and 330 Ω

• Discharged contact test (ISO10605.2008) at 150 pF and 2 kΩ

• Discharged contact test (ISO10605.2008) at 330 pF and 2 kΩ

This protection is ensured at VSUP1, VSUP2, WAKE1, WAKE2, FS0B pins.

10 Thermal ratings

Symbol

Description (Rating)

Min

Max

Unit

Thermal ratings

TA

Ambient temperature (Grade 1)

−40

125

°C

TJ

Junction temperature (Grade 1)

−40

150

°C

TSTG

Storage temperature

−55

150

°C

Thermal resistance (per JEDEC JESD51-2 and JESD51-8)

RθJA

Thermal resistance junction to ambient (2s2p)

—

31

°C/W

RθJA

Thermal resistance junction to ambient (2s6p)

—

23

°C/W

RθJB

Thermal resistance junction to board (2s2p)

—

15

°C/W

RθJB

Thermal resistance junction to board (2s6p)

—

10

°C/W

RθJC_BOT

Thermal resistance junction to case bottom

(between the die and the solder pad on the bottom of the package)

—

1

°C/W

RθJP_TOP

Thermal resistance junction to package top (between package top and the

junction temperature)

—

3

°C/W

Table 5. Thermal ratings

FS8600_SDS

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© 2022 NXP B.V. All rights reserved.

Product short data sheet

Rev. 2.0 — 7 December 2022

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