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TLV9041UIDBVR Datasheet(PDF) 16 Page - Texas Instruments |
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TLV9041UIDBVR Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 72 page ![]() 7.8 Typical Characteristics (continued) at TA = 25°C, V+ = 2.75 V, V– = –2.75 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) Capacitive Load (pF) 10 30 50 70 90 110 130 150 36 40 44 48 52 56 60 64 68 72 D005 Figure 7-31. Phase Margin vs Capacitive Load Time (25 µs/div) -3 -2.4 -1.8 -1.2 -0.6 0 0.6 1.2 1.8 2.4 3 D21_ VIN VOUT G = 1 VIN = 6 VPP Figure 7-32. No Phase Reversal Time (100 µs/div) -3 -2 -1 0 1 2 3 D22_ VIN VOUT G = –10 VIN = 600 mVPP Figure 7-33. Overload Recovery Time (10 µs/div) -12.5 -10 -7.5 -5 -2.5 0 2.5 5 7.5 10 12.5 D25_ VIN VOUT G = 1 VIN = 20 mVPP CL = 10 pF Figure 7-34. Small-Signal Step Response Time (10 µs/div) -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 D27_ VIN VOUT G = 1 VIN = 4 VPP CL = 10 pF Figure 7-35. Large-Signal Step Response Time (5 µs/div) D29_ G = 1 VIN = 4 VPP CL = 10 pF Figure 7-36. Large-Signal Settling Time (Negative) TLV9041, TLV9042, TLV9044 SBOS836G – MARCH 2020 – REVISED MARCH 2022 www.ti.com 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TLV9041 TLV9042 TLV9044 |
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