STM32F469AI datasheet(40/220 Pages) STMICROELECTRONICS

40 / 220 page

Functional overview

STM32F469xx

40/220

DS11189 Rev 7

2.24.6

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

downcounter. It features:



a 24-bit downcounter



autoreload capability



maskable system interrupt generation when the counter reaches 0



programmable clock source.

2.25

Inter-integrated circuit interface (I2C)

Up to three I²C bus interfaces can operate in multimaster and slave modes. They can

support the standard (up to 100 KHz), and fast (up to 400 KHz) modes. They support the

7/10-bit addressing mode and the 7-bit dual addressing mode (as slave). A hardware CRC

generation/verification is embedded.

The I²C bus interfaces can be served by DMA and support SMBus 2.0/PMBus.

The devices also include programmable analog and digital noise filters (see Table 7).

2.26

Universal synchronous/asynchronous receiver transmitters

(USART)

The devices embed four universal synchronous/asynchronous receiver transmitters

(USART1, USART2, USART3 and USART6) and four universal asynchronous receiver

transmitters (UART4, UART5, UART7, and UART8).

These six interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to

communicate at speeds of up to 11.25 Mbit/s. The other available interfaces communicate

at up to 5.62 bit/s.

USART1, USART2, USART3 and USART6 also provide hardware management of the CTS

and RTS signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication

capability. All interfaces can be served by the DMA controller.

Table 7. Comparison of I2C analog and digital filters

Filter

Analog

Digital

Pulse width of suppressed spikes

 50 ns

Programmable length, from one to fifteen I2C peripheral clocks

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