ADPA7006CHIP

Data Sheet

Rev. 0 | Page 6 of 24

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VREF

RFIN

RFOUT

VDET

ADPA7006

TOP VIEW

(Not to Scale)

2

1

8

34

5

6

7

14

13

12

11

10

9

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RFIN

RF Signal Input. This pad is ac-coupled and matched to 50 Ω.

2, 14

Amplifier Gate Control.

3, 4, 5, 6, 10,

11, 12, 13

Drain Bias for the Amplifier.

7

VREF

Reference Diode. Use this pad for temperature compensation of the VDET RF output power measurements.

When used in combination with VDET, this voltage provides temperature compensation to the VDET RF

output power measurements.

8

RFOUT

RF Signal Output. This pad is ac-coupled and matched to 50 Ω.

9

VDET

Detector Diode for Measuring the RF Output Power. Detection via this pad requires the application of a dc

bias voltage through an external series resistor. When used in combination with VREF, the difference

voltage, VREF − VDET, is a temperature compensated dc voltage proportional to the RF output power.

Die Bottom

GND

The pads and die bottom must be connected to RF and dc ground.

INTERFACE SCHEMATICS

GND

Figure 3. GND Interface Schematic

VREF

Figure 4. VREF Interface Schematic

VDET

Figure 5. VDET Interface Schematic

RFIN

Figure 6. RFIN Interface Schematic

RFOUT

Figure 8. RFOUT Interface Schematic

TO