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5220-DS02-R Datasheet(PDF) 65 Page - Broadcom Corporation. |
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5220-DS02-R Datasheet(HTML) 65 Page - Broadcom Corporation. |
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65 / 90 page ![]() Preliminary Data Sheet BCM5220 04/20/04 Broa d c om Co rp o r a t i o n Document 5220-DS04-405-R Auxiliary Multiple PHY Register Page 53 BROADCOM TEST REGISTER Shadow Register Enable Writing a 1 to bit 7 of register 1Fh allows R/W access to the shadow registers. Table 30: Broadcom Test (Address 31d, 1Fh) BIt Name R/W Description Default 15:8 Reserveda RO Ignore when read 00h 7 Shadow register enable R/W 1 = Enable shadow registers 0 = Disable shadow registers 0 6 Reserveda RO Ignore when read 0 5 Reserveda R/W Write as 0, Ignore when read 0 4:0 Reserveda a. Preserve existing values of reserved bits by completing a “Read/Modify Write.” R/W Write as 0Bh, Ignore when read 0Bh Notes: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). |
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