2004 November 8

8

LPC2124

Philips Semiconductors

Single Chip 32-bit Microcontroller

Erratasheet

LDR rn, [pc,#offset]

In this case the PC is saved to the link register R14_abt in only word resolution, not half-word

resolution. The effect is that the link register holds an address that could be #2 less than it should

be, so any abort handler could return to one instruction earlier than intended.

Work around:

In a system that does not use Thumb state, there will be no problem.

In a system that uses Thumb state but does not use data aborts, or does not try to use data aborts

in a recoverable manner, there will be no problem.

Otherwise the workaround is to ensure that a STR, STMIA or PUSH cannot precede a PC-relative

load. One method for this is to add a NOP before any PC-relative load instruction. However this is

would have to be done manually.

Electrical and Timing Specification Deviations of the LPC2124

Introduction:

Problem:

Any pin associated with either an external interrupt input or an analog to digital converter (ADC)

as either an ADC input or and external interrupt input, not just the ones that are configured as such.

work-around:

Make sure that high logic levels are at least 2.4V at these pins.