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SP385ECT-L/TR Datasheet(PDF) 8 Page - Exar Corporation |
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SP385ECT-L/TR Datasheet(HTML) 8 Page - Exar Corporation |
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8 / 16 page ![]() 8 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP385E_100_030811 Charge Pump The charge pump is a Exar–patented design (5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capaci- tors, but uses a four–phase voltage shifting technique to attain symmetrical 10V power supplies. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 — V SS charge storage —During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to +5V. Cl+ is then switched to ground and the charge in C1– is transferred to C2–. Since C2+ is con- nected to +5V, the voltage potential across capacitor C2 is now 10V. Phase 2 — V SS transfer — Phase two of the clock con- nects the negative terminal of C2 to the V SS storage capacitor and the positive terminal of C2 to ground, and transfers the generated –l0V to C3. Simultaneously, the positive side of capacitor C 1 is switched to +5V and the nega- tive side is connected to ground. Phase 3 — V DD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –5V in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is l0V. Phase 4 — V DD transfer — The fourth phase of the clock connects the negative terminal of C2 to ground, and transfers the generated l0V across C2 to C4, the V DD storage capacitor. Again, simultaneously with this, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. Since both V+ and V– are separately gener- ated from V CC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– com- pared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 15kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. Figure 1. Charge Pump Waveform +10V a) C2+ GND GND b) C2– –10V |
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