LSM303D datasheet(13/52 Pages) STMICROELECTRONICS

13 / 52 page

DocID023312 Rev 2

13/52

LSM303D

Module specifications

2.4

Communication interface characteristics

2.4.1

SPI - serial peripheral interface

Subject to general operating conditions for Vdd and Top.

Figure 3. SPI slave timing diagram

Note:

Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO for both input and output

ports.

Table 6. SPI slave timing values

Symbol

Parameter

Value (1)

Unit

Min.

Max.

tc(SPC)

SPI clock cycle

100

fc(SPC)

SPI clock frequency

MHz

tsu(CS)

CS setup time

th(CS)

CS hold time

tsu(SI)

SDI input setup time

th(SI)

SDI input hold time

tv(SO)

SDO valid output time

th(SO)

SDO output hold time

tdis(SO)

SDO output disable time

1. Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not

tested in production.

SPC

SDI

SDO

tsu(CS)

tv(SO)

th(SO)

th(SI)

tsu(SI)

th(CS)

tdis(SO)

tc(SPC)

MSB IN

MSB OUT

LSB OUT

LSB IN

(3)

LSM303D Datasheet(PDF) 13 Page - STMicroelectronics

LSM303D Datasheet(HTML) 13 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL