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LM4560 Datasheet(PDF) 18 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM4560
Description  Advanced PCI Audio Accelerator
PDF  54 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM4560 Datasheet(HTML) 18 Page - National Semiconductor (TI)

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3.0 Register Description (Continued)
When MPU-401 MIDI engine is at internal loopback opera-
tion state (MPUR3.7 is set 1), MPUR1.7 is masked from
MIDI-IN FIFO state automatically. This means if MIDI-IN
FIFO is not empty, MPUR1.7 is still reading as 1. When
MIDI-IN FIFO is full, MIDI clock will be stopped until MIDI-IN
FIFO is not full.
3.4.4 Legacy Gameport Register
These 16-byte registers can be accessed on Audio Base (I/O
or MEM), or Gameport Base.
3.4.4.1 GAMER0 (Gameport Control Register)
Address: AudioBase + 30h
Size:
2 bits
Type:
Read/Write
Default:
0b
Bit 7
0 Disable Enhanced Digital Gameport;
1 Enable Enhanced Digital Gameport;
Bit 6
0 Disable Testmode for Enhanced Mode Gameport
1 Enable Testmode for Enhanced Mode Gameport
Bit 5..0 X Reserved;
When Bit 6 is set, the gamecounter will overflow every 1024
AC97 Bitclk. Bit 6 is only useful when Bit 7 is set. Bit 7 will be
automatically cleared if there are any I/O operation to
GAMER1.
3.4.4.2 GAMER1 (Legacy Gameport I/O Register)
Address: AudioBase + 31h or GAMEBase+0-7h
Size:
8 bits
Type:
Read/Write
Default:
00h
Write
Bit 7..0
X
Trigger the Legacy Gameport I/O
Read Cycle
Read
Bit 7
0
Joystick B Button 1 Pressed (Input
Pad Stay at Low Level);
1
Joystick B Button 1 Released (Input
Pad Stay at High Level);
Bit 6
0
Joystick B Button 0 Pressed (Input
Pad Stay at Low Level);
1
Joystick B Button 0 Released (Input
Pad Stay at High Level);
Bit 5
0
Joystick A Button 1 Pressed (Input
Pad Stay at Low Level);
1
Joystick A Button 1 Released (Input
Pad Stay at High Level);
Bit 4
0
Joystick A Button 0 Pressed (Input
Pad Stay at Low Level);
1
Joystick A Button 0 Released (Input
Pad Stay at High Level);
Bit 3
0
Joystick B Y-Axies Input Pad Stay at
High Level
1
Joystick B Y-Axies Input Pad Stay at
Low Level
Bit 2
0
Joystick B X-Axies Input Pad Stay at
High Level
1
Joystick B X-Axies Input Pad Stay at
Low Level
Bit 1
0
Joystick A Y-Axies Input Pad Stay at
High Level
1
Joystick A Y-Axies Input Pad Stay at
Low Level
Bit 0
0
Joystick A X-Axies Input Pad Stay at
High Level
1
Joystick A X-Axies Input Pad Stay at
Low Level
3.4.4.3 GAMER2 (Enhanced Gameport Position
Register 1)
Address: AudioBase + 34h
Size:
32 bits
Type:
Read Only
Default:
00000000h
Bit 31..16 Joystick A Y-Axies Position Latch Value (16 bit un-
signed)
Bit 15..0 Joystick A X-Axies Position Latch Value (16 bit un-
signed)
3.4.4.4 GAMER3 (Enhanced Gameport Position
Register 2)
Address: AudioBase + 38h
Size:
32 bits
Type:
Read Only
Default:
00000000h
Bit 31..16 Joystick B Y-Axies Position Latch Value (16 bit un-
signed)
Bit 15..0 Joystick B X-Axies Position Latch Value (16 bit un-
signed)
3.4.4.5 Implementation Note
Any I/O operation to legacy GAMEBase will function as nor-
mal
gameport
mode.
At
enhanced
gameport
mode
(GAMER0.7 is set 1), when the 16 bit game counter over-
flowed, the external pad for joystick A&B X-Y Axies State will
stop drived low, then game counter will counting up from
zero with AC97 bitclock (12.288 MHz ). Each game position
latch (4 * 16 bits) will store the game counter value when its
corresponding axies state pad recharged from low to high.
When the game counter overflowed, the game position latch
will be set to the overflowed value (0FFFFh) if its corre-
sponding axies state pad is still low.
The game position latches can be read in word or
double word format. These latches should be frozen
when reading and be freed after reading.
3.4.5 Serial Interface Control Register:
These 16-byte registers can only be accessed on Audio
Base (I/O or MEM).
3.4.5.1 ACWR (AC-97 Mixer Write Register)
Address: AudioBase + 40h
Size:
32 bits
Type:
Read/Write
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