STM32F091VC datasheet(85/127 Pages) STMICROELECTRONICS

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STM32F091xB STM32F091xC

Electrical characteristics

Figure 25. Recommended NRST pin protection

1. The external capacitor protects the device against parasitic resets.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 56: NRST pin characteristics. Otherwise the reset will not be taken into account by the device.

6.3.16

12-bit ADC characteristics

Unless otherwise specified, the parameters given in Table 57 are derived from tests

performed under the conditions summarized in Table 24: General operating conditions.

Note:

It is recommended to perform a calibration after each power-up.

Vhys(NRST)

NRST Schmitt trigger voltage

hysteresis

200

RPU

Weak pull-up equivalent

resistor(2)

VIN = VSS

VF(NRST) NRST input filtered pulse

100(1)

VNF(NRST) NRST input not filtered pulse

2.7 < VDD < 3.6

300(3)

2.0 < VDD < 3.6

500(3)

1. Data based on design simulation only. Not tested in production.

2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series

resistance is minimal (~10% order).

3. Data based on design simulation only. Not tested in production.

Table 56. NRST pin characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 57. ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply voltage for

ADC ON

2.4

3.6

IDDA (ADC)

Current consumption of

the ADC(1)

VDDA = 3.3 V

0.9

fADC

ADC clock frequency

0.6

MHz

fS(2)

Sampling rate

12-bit resolution

0.043

MHz

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