LM3524DN datasheet(19/22 Pages) NSC

19 / 22 page

Typical Applications (Continued)

In calculating the output capacitor C

o it can be seen that Co

supplies I

o during tON. The voltage change on Co during this

time will be some

∆V

c =

∆V

o or the output ripple of the

regulator. Calculation of C

o is:

where: C

o is in farads, f is the switching frequency,

∆V

o is the p-p output ripple

Calculation of inductor L1 is as follows:

IN is applied across L1

where: L1 is in henrys, f is the switching frequency in Hz

To apply the above theory, a complete step-up switching

regulator is shown in Figure 20. Since V

IN is 5V, VREF is tied

to V

IN. The input voltage is divided by 2 to bias the error

amplifier’s inverting input. The output voltage is:

The network D1, C1 forms a slow start circuit.

This holds the output of the error amplifier initially low thus

reducing the duty-cycle to a minimum. Without the slow start

circuit the inductor may saturate at turn-on because it has to

supply high peak currents to charge the output capacitor

from 0V. It should also be noted that this circuit has no

supply rejection. By adding a reference voltage at the non-

inverting input to the error amplifier, see Figure 21, the input

voltage variations are rejected.

The LM3524D can also be used in inductorless switching

regulators. Figure 22 shows a polarity inverter which if con-

nected to Figure 20 provides a −15V unregulated output.

LM3524DN Datasheet(PDF) 19 Page - National Semiconductor (TI)