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PL602-2XSC-R Datasheet(PDF) 2 Page - Micrel Semiconductor |
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PL602-2XSC-R Datasheet(HTML) 2 Page - Micrel Semiconductor |
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2 / 6 page ![]() PL602-XX HCSL Compatible Clock Generator for PCI Express Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 02/08/11 Page 2 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RAT INGS PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage Range VDD -0.5 4.6 V Input Voltage Range VI -0.5 VDD+0.5 V Output Voltage Range VO -0.5 VDD+0.5 V Soldering Temperature 260 C Storage Temperature TS -65 150 C Ambient Operating Temperature* -40 +85 C Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only. AC SPECIFICATIONS PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Crystal Input Frequency Fundamental Crystal 25 MHz Input (FIN) Frequency 25 MHz Input (FIN) Signal Amplitude Internally AC coupled 0.9 VDD Vpp Output Frequency 25 200 MHz Output Enable Time OE Function; Ta=25º C, Add one clock period to this measurement for a usable clock output. 10 ns Output Disable Time OE Function; Ta=25º C 10 ns Settling Time At power-up (VDD > 2.25V) 10 ms VDD Sensitivity Frequency vs. VDD, ±10% -2 2 ppm Output Rise Time 10/90%VOH 0.3 0.5 ns Output Fall Time 90/10%VOH 0.3 0.5 ns Skew Between Outputs Measured at 50% VOH 250 ps Duty Cycle At VDD/2 45 50 55 % Period Jitter, peak-to-peak - With capacitive decoupling between VDD and GND - At 100MHz - 20,000 samples measured 28 ps Cycle-to-Cycle, RMS 9 ps Cycle-to-Cycle, peak 25 ps TIE, RMS 2 ps |
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