www.irf.com

1

4/8/04

IRF6607

Notes

 through ˆ are on page 11

Mount Techniques

Description

to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The

DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and

vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the

manufacturing methods and process. The DirectFET package allows dual sided cooling to maximize thermal transfer in

power systems, IMPROVING previous best thermal resistance by 80%.

The IRF6607 balances both low resistance and low charge along with ultra low package inductance to reduce both conduc-

tion and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power

the latest generation of processors operating at higher frequencies. The IRF6607 has been optimized for parameters that

are critical in synchronous buck converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The

IRF6607 offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.

DirectFET

™ISOMETRIC

MT

Qg(typ.)

30V

3.3m

Ω@V

50nC

4.4m

Ω@V

SQ

SX

ST

MQ

MX

MT

Applicable DirectFET Outline and Substrate Outline (see p.9,10 for details)

Absolute Maximum Ratings

Parameter

Units

Drain-to-Source Voltage

V

Gate-to-Source Voltage

A

Pulsed Drain Current

c

Power Dissipation

g

Power Dissipation

g

W

Power Dissipation

Linear Derating Factor

W/°C

Operating Junction and

°C

Storage Temperature Range

Thermal Resistance

Parameter

Typ.

Max.

Units

Junction-to-Ambient

fj

–––

35

Junction-to-Ambient

gj

12.5

–––

Junction-to-Ambient

hj

20

–––

°C/W

Junction-to-Case

ij

–––

3.0

Junction-to-PCB Mounted

–––

1.0

-40 to + 150

3.6

0.029

2.3

42

Max.

27

22

220

±12

30

94

PD - 94574B