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54F08DM Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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54F08DM Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 54F/74F08 Quad 2-Input AND Gate General Description This device contains four independent gates, each of which performs the logic AND function. Features n Guaranteed 4000V minimum ESD protection Ordering Code: See Section 0 Commercial Military Package Package Description Number 74F08PC N14A 14-Lead (0.300" Wide) Molded Dual-In-Line 54F08DM (Note 2) J14A 14-Lead Ceramic Dual-In-Line 74F08SC (Note 1) M14A 14-Lead (0.150" Wide) Molded Small Outline, JEDEC 74F08SJ (Note 1) M14D 14-Lead (0.300" Wide) Molded Small Outline, EIAJ 54F08FM (Note 2) W14B 14-Lead Cerpack 54F08LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB. Logic Symbol Connection Diagrams TRI-STATE® is a registered trademark of National Semiconductor Corporation. IEEE/IEC DS009457-3 Pin Assignment for DIP, SOIC and Flatpak DS009457-2 Pin Assignment for LCC DS009457-1 December 1994 © 1997 National Semiconductor Corporation DS009457 www.national.com 1 PrintDate=1997/08/26 PrintTime=15:23:43 9460 ds009457 Rev. No. 1 cmserv Proof 1 DSXXX |
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