USB3320 datasheet(35/70 Pages) MICROCHIP

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DS00001792B-page 35

USB3320

6.1.2

ULPI INTERFACE TIMING IN SYNCHRONOUS MODE

The control and data timing relationships are given in Figure 6-2 and Table 4-3. All timing is relative to the rising clock

edge of the 60MHz ULPI Clock.

6.2

ULPI Register Access

A command from the Link begins a ULPI transfer from the Link to the USB3320. Before reading a ULPI register, the Link

must wait until DIR is low, and then send a Transmit Command Byte (TXD CMD) byte. The TXD CMD byte informs the

USB3320 of the type of data being sent. The TXD CMD is followed by a data transfer to or from the USB3320. Table 6-

2 gives the TXD command byte (TXD CMD) encoding for the USB3320. The upper two bits of the TX CMD instruct the

transceiver as to what type of packet the Link is transmitting. The ULPI registers retain their contents when the trans-

ceiver is in Low Power Mode, Full Speed/Low Speed Serial Mode, or Carkit Mode.

FIGURE 6-2:

ULPI SINGLE DATA RATE TIMING DIAGRAM IN SYNCHRONOUS MODE

TABLE 6-2:

ULPI TXD CMD BYTE ENCODING

Command Name

CMD Bits[7:6]

CMD Bits[5:0]

Command Description

Idle

00b

000000b

ULPI Idle

Transmit

01b

000000b

USB Transmit Packet with No Packet Identifier (NOPID)

00XXXXb

USB Transmit Packet Identifier (PID) where DATA[3:0]

is equal to the 4-bit PID. P3P2P1P0 where P3 is the

MSB.

10b

XXXXXXb

Immediate Register Write Command where: DATA[5:0]

= 6-bit register address

101111b

Extended Register Write Command where the 8-bit

11b

XXXXXXb

Immediate Register Read Command where: DATA[5:0]

= 6-bit register address

101111b

Extended Register Read Command where the 8-bit

60MHz ULPI -

CLK

Control In -

STP

Data In -

DATA[7:0]

Control Out -

DIR, NXT

Data Out -

DATA[7:0]

TSC

TSD

THC

THD

TDC

TDD

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