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DRV8701PRGET Datasheet(PDF) 13 Page - Texas Instruments |
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DRV8701PRGET Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 42 page ![]() Gate Driver Gate Driver Current Regulation VM VM 0.1 µF 10 µF minimum Power VCP CPH CPL 3.3-V LDO 4.8-V LDO VGLS LDO DVDD AVDD 0.1 µF Charge Pump 1 µF VM 1 µF 1 µF 30 mA 30 mA Control Inputs PH/IN1 EN/IN2 nSLEEP IDRIVE RIDRIVE Outputs SNSOUT nFAULT GL2 SH2 GH2 VCP VGLS HS LS GL1 SH1 GH1 VCP VGLS HS LS VM VM RSENSE + - AV SP SN SO VREF GND GND PPAD Logic BDC DRV8701 www.ti.com SLVSCX5B – MARCH 2015 – REVISED JULY 2015 7.2 Functional Block Diagram Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: DRV8701 |
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