STM32F205RC datasheet(70/177 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F20xxx

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Doc ID 15818 Rev 9

Typical and maximum current consumption

The MCU is placed under the following conditions:

●

At startup, all I/O pins are configured as analog inputs by firmware.

●

All peripherals are disabled except if it is explicitly mentioned.

●

The Flash memory access time is adjusted to fHCLK frequency (0 wait state from 0 to

30 MHz, 1 wait state from 30 to 60 MHz, 2 wait states from 60 to 90 MHz and 3 wait

states from 90 to 120 MHz).

●

When the peripherals are enabled HCLK is the system clock, fPCLK1 = fHCLK/4, and

fPCLK2 = fHCLK/2, except is explicitly mentioned.

●

The maximum values are obtained for VDD = 3.6 V and maximum ambient temperature

(TA), and the typical values for TA= 25 °C and VDD = 3.3 V unless otherwise specified.

Table 18.

Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (ART accelerator disabled)

Symbol

Parameter

Conditions

fHCLK

Typ

Max(1)

Unit

TA = 25 °C TA = 85 °C TA = 105 °C

IDD

Supply current

in Run mode

External clock(2), all

peripherals enabled(3)

120 MHz

90 MHz

60 MHz

30 MHz

25 MHz

16 MHz(4)

8 MHz

4 MHz

2 MHz

External clock(2), all

peripherals disabled

120 MHz

90 MHz

60 MHz

30 MHz

25 MHz

16 MHz(4)

626

8 MHz

4 MHz

2 MHz

Based on characterization, tested in production at VDD max and fHCLK max with peripherals enabled.

External clock is 4 MHz and PLL is on when fHCLK > 25 MHz.

When the ADC is on (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for

the analog part.

In this case HCLK = system clock/2.

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