 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
VIPER27HDTR Datasheet(PDF) 22 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
VIPER27HDTR Datasheet(HTML) 22 Page - STMicroelectronics |
|
|
22 / 31 page  Operation descriptions VIPER27 22/31 Doc ID 15133 Rev 5 Equation 7 Equation 8 The RFB(DYN) is the dynamic resistance seen by the FB pin. The CFB1 capacitor fixes the OLP delay and usually CFB1 results much higher than CFB. The Equation 5 can be still used to calculate the OLP delay time but CFB1 has to be considered instead of CFB. Using the alternative compensation network, the designer can satisfy, in all case, the loop stability and the enough OLP delay time alike. Figure 28. FB pin configuration Figure 29. FB pin configuration () 1 FB ) DYN ( FB FB 1 FB ) DYN ( FB PFB R R C 2 R R f ⋅ ⋅ ⋅ π ⋅ + = () ) DYN ( FB 1 FB 1 FB 1 PFB R R C 2 1 f + ⋅ ⋅ π ⋅ = From sense FET 4.8V BURST PWM CONTROL Cfb To PWM Logic BURST-MODE REFERENCES BURST-MODE LOGIC + - PWM + - OLP comparator To disable logic 4.8V From sense FET PWM CONTROL + - PWM BURST To disable logic + - OLP comparator To PWM Logic BURST-MODE LOGIC Cfb1 Rfb1 Cfb BURST-MODE REFERENCES |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
