PCAL9554CBS datasheet(2/42 Pages) NXP

2 / 42 page

PCAL9554B_PCAL9554C

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Product data sheet

Rev. 2 — 10 December 2012

2 of 42

NXP Semiconductors

PCAL9554B; PCAL9554C

Low-voltage 8-bit I2C-bus/SMBus low power I/O port

Features and benefits

 I2C-bus to parallel port expander

 Operating power supply voltage range of 1.65 V to 5.5 V

 Low standby current consumption:

 1.5

A (typical at 5 V V

DD)

 1.0

A (typical at 3.3 V V

DD)

 Schmitt-trigger action allows slow input transition and better switching noise immunity

at the SCL and SDA inputs

 Vhys =0.10  VDD (typical)

 5 V tolerant I/Os

 Open-drain active LOW interrupt output (INT)

 400 kHz Fast-mode I2C-bus

 Internal power-on reset

 Power-up with all channels configured as inputs

 No glitch on power-up

 Latched outputs with 25 mA drive maximum capability for directly driving LEDs

 Latch-up performance exceeds 100 mA per JESD78, Class II

 ESD protection exceeds JESD22

 2000 V Human Body Model (A114-A)

 1000 V Charged-Device Model (C101)

 Packages offered: TSSOP16 and HVQFN16

2.1 Agile I/O features

 Pin to pin replacement for PCA9554 and PCA9554B, PCA9554A and PCA9554C with

interrupts disabled at power-up

 Software backward compatible with PCA9554 and PCA9554B, PCA9554A and

PCA9554C

 Output port configuration: bank selectable push-pull or open-drain output stages

 Interrupt status: read-only register identifies the source of an interrupt

 Bit-wise I/O programming features:

 Output drive strength: four programmable drive strengths to reduce rise and fall

times in low capacitance applications

 Input latch: Input Port register values changes are kept until the Input Port register

is read

 Pull-up/pull-down enable: floating input or pull-up/down resistor enable

 Pull-up/pull-down selection: 100 k

 pull-up/down resistor selection

 Interrupt mask: mask prevents the generation of the interrupt when input changes

state

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