SN74LVC06AMDREP datasheet(2/9 Pages) TI1

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Absolute Maximum Ratings

(1)

Recommended Operating Conditions

(1)

SN74LVC06A-EP

HEX INVERTER BUFFER/DRIVER

WITH OPEN DRAIN OUTPUTS

SCAS832A – APRIL 2007 – REVISED MAY 2007

LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)

ORDERING INFORMATION(1)

PACKAGE(2)

ORDERABLE PART NUMBER

TOP-SIDE MARKING

–55

°C to 125°C

SOIC – D

Reel of 2500

SN74LVC06AMDREP

LVC06AM

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

VCC

Supply voltage range

–0.5

6.5

Input voltage range(2)

–0.5

6.5

Output voltage range

–0.5

6.5

IIK

Input clamp current

VI < 0 V

–50

IOK

Output clamp current

VO < 0 V

–50

Continuous output current

±50

Continuous current through VCC or GND

±100

Package thermal impedance(3)

°C/W

Tstg

Storage temperature range

–65

150

°C

Ptot

Power dissipation(4)

TA = –55°C to 125°C

500

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3)

The package thermal impedance is calculated in accordance with JESD 51-7.

(4)

Above 70

°C the value of P

tot derates linearly with 8 mW/K.

TA = 25°C

–55

°C to 125°C

UNIT

MIN

MAX

MIN

MAX

Operating

1.65

3.6

1.65

3.6

VCC

Supply voltage

Data retention only

1.5

VCC = 1.65 V to 1.95 V

0.65

× V

0.65

× V

High-level

VIH

VCC = 2.3 V to 2.7 V

1.7

input voltage

VCC = 2.7 V to 3.6 V

VCC = 1.65 V to 1.95 V

0.35

× V

0.35

× V

Low-level

VIL

VCC = 2.3 V to 2.7 V

0.7

input voltage

VCC = 2.7 V to 3.6 V

0.8

Input voltage

5.5

Output voltage

5.5

(1)

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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