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SN74LVC86AMDREP Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC86AMDREP Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 11 page ![]() www.ti.com FEATURES D OR PW PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B 1Y 2A 2B 2Y GND VCC 4B 4A 4Y 3B 3A 3Y DESCRIPTION/ORDERING INFORMATION SN74LVC86A-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS752B – DECEMBER 2003 – REVISED JULY 2007 • Controlled Baseline • Max t pd of 4.6 ns at 3.3 V – One Assembly/Test Site, One Fabrication • Typical V OLP (Output Ground Bounce) <0.8 V Site at VCC = 3.3 V, TA = 25°C • Extended Temperature Performance of –40°C • Typical V OHV (Output VOH Undershoot) >2 V at to 125 °C and –55°C to 125°C VCC = 3.3 V, TA = 25°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Operates From 2 V to 3.6 V • Inputs Accept Voltages to 5.5 V (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation. The device performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION(1) TA PACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC – D Reel of 2500 SN74LVC86AQDREP LVC86AE –40 °C to 125°C TSSOP – PW Reel of 2000 SN74LVC86AQPWREP LVC86AE –55 °C to 125°C SOIC – D Reel of 2500 SN74LVC86AMDREP LVC86AM (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE (EACH GATE) INPUTS OUTPUT Y A B L L L L H H H L H H H L Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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