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AS8530-ASOT Datasheet(PDF) 18 Page - ams AG |
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AS8530-ASOT Datasheet(HTML) 18 Page - ams AG |
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18 / 32 page  www.austriamicrosystems.com/Lin_CompanionIC/AS8530 Revision 1.1 18 - 32 AS8530 Datasheet - Application In form atio n 8 Application Information 8.1 Initialization When the power supply is switched on, if VSUP > VSUVR_OFF, RESET_VSUP_N becomes inactive (high). After this, the voltage regulator starts with a default LDO output setting of 3.3V and Vuvr_off setting of 2.75V. If VCC > Vuvr_off (2.75V), active-low PORN_2_OTP is generated. The rising edge of PORN_2_OTP loads contents of fuse onto the OTP latch after load access time TLoad. LOAD_OTP_IN_PREREG signal loads contents of OTP latch onto the pre-regulator domain register. This register gives actual settings of LDO, Vuvr_off and Reset Timeout period TRes. This is done because the OTP block is powered by the VCC. If VCC > Vuvr_off (phase 2), Reset timeout is restarted. RESET signal is de- asserted after Reset Timeout period TRes (phase 2) and then device enters into normal mode. The circuit initializes correctly also for very slow ramp on VSUP (of the order of 0.5V/min). Figure 7. Initialization Sequence for AS8530 LDO Off LDO On Vuvr_off = 2.75V, LDO setting = 3.3V tRES = 4msec LDO On Vuvr_off = from OTP Block, LDO setting = from OTP Block tRES = from OTP Block VCC VSUP Device Settings RESET_VCC_N RESET_VSUP_N PORN_2_OTP LOAD_OTP_IN_PREREG RESET Vuvr_off Vsuvr_off 6 Cycles of RC-Oscillator PHASE 1 PHASE 2 If Phase 1 POR threshold == Phase 2 POR threshold Tres = Reset Timeout from OTP Block If Phase 1 POR threshold != Phase 2 POR threshold Tres = Reset Timeout from OTP Block Vuvr_off |
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