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M24LR64-R_1006 Datasheet(PDF) 43 Page - STMicroelectronics |
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M24LR64-R_1006 Datasheet(HTML) 43 Page - STMicroelectronics |
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43 / 128 page  M24LR64-R Data rate and data coding Doc ID 15170 Rev 10 43/128 Figure 17. Detail of a time period 9.2 Data coding mode: 1 out of 4 The value of 2 bits is represented by the position of one pause. The position of the pause on 1 of 4 successive time periods of 18.88 µs (256/fC), determines the value of the 2 bits. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. In this case the transmission of one byte takes 302.08 µs and the resulting data rate is 26.48 Kbits/s (fC/512). Figure 18 illustrates the 1 out of 4 pulse position technique and coding. Figure 19 shows the transmission of E1h (225d - 1110 0001b) by the VCD. AI06657 2 2 5 18.88 µs 9.44 µs Pulse Modulated Carrier 2 2 6 2 2 4 . . . . . . . . . . . . . . Time Period one of 256 |
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