ADT7420UCPZ-R2 datasheet(11/24 Pages) AD

11 / 24 page

Preliminary Technical Data

ADT7420

Rev. PrA | Page 11 of

SHUTDOWN

The ADT7420 can be placed in shutdown mode by writing 1

to Bit 5 and 1 to Bit 6 of the configuration register (Register

Address 0x03), in which case the entire IC is shut down and

no further conversions are initiated until the ADT7420 is

taken out of shutdown mode. The ADT7420 can be taken

out of shutdown mode by writing 0 to Bit 5 and 0 to Bit 6 in

the configuration register (Register Address 0x03). The

ADT7420 typically takes 1 ms (with a 0.1 µF decoupling

capacitor) to come out of shutdown mode. The conversion

result from the last conversion prior to shutdown can still be

read from the ADT7420 even when it is in shutdown mode.

When the part is taken out of shutdown mode, the internal

clock is started and a conversion is initiated.

FAULT QUEUE

Bit 0 and Bit 1 of the configuration register (Register Address

0x03) are used to set up a fault queue. The queue can facilitate up

to four fault events to prevent false tripping of the INT and CT pins

when the ADT7420 is used in a noisy temperature environment.

The number of faults set in the queue must occur consecutively

to set the INT and CT outputs. For example, if the number of

faults set in the queue is four, then four consecutive temperature

conversions must occur with each result exceeding a temperature

limit in any of the limit registers before the INT and CT pins are

activated. If two consecutive temperature conversions exceed a

temperature limit and the third conversion does not, the fault

count is reset back to zero.

ADT7420UCPZ-R2 Datasheet(PDF) 11 Page - Analog Devices