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MPC8544ECVTARF Datasheet(PDF) 20 Page - Freescale Semiconductor, Inc

Part # MPC8544ECVTARF
Description  PowerQUICC??III Integrated Processor Hardware Specifications
PDF  120 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8544ECVTARF Datasheet(HTML) 20 Page - Freescale Semiconductor, Inc

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3
20
Freescale Semiconductor
DDR and DDR2 SDRAM
Figure 3 shows the DDR SDRAM input timing diagram.
Figure 3. DDR SDRAM Input Timing Diagram (tDISKEW)
6.2.2
DDR SDRAM Output AC Timing Specifications
Table 18 provides the output AC timing specifications for the DDR SDRAM interface.
Table 18. DDR SDRAM Output AC Timing Specifications
At recommended operating conditions.
Parameter
Symbol1
Min
Max
Unit
Notes
MCK[n] cycle time, MCK[n]/MCK[n] crossing
tMCK
3.75
6
ns
2
ADDR/CMD output setup with respect to MCK
tDDKHAS
ns
3
533 MHz
400 MHz
333 MHz
1.48
1.95
2.40
7
ADDR/CMD output hold with respect to MCK
tDDKHAX
ns
3
533 MHz
400 MHz
333 MHz
1.48
1.95
2.40
7
MCS[n] output setup with respect to MCK
tDDKHCS
ns
3
533 MHz
400 MHz
333 MHz
1.48
1.95
2.40
7
MCS[n] output hold with respect to MCK
tDDKHCX
ns
3
533 MHz
400 MHz
333 MHz
1.48
1.95
2.40
7
MCK to MDQS Skew
tDDKHMH
–0.6
0.6
ns
4
MCK[n]
MCK[n]
tMCK
MDQ[x]
MDQS[n]
D1
D0
tDISKEW
tDISKEW



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