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ATtiny44 Datasheet(PDF) 38 Page - ATMEL Corporation |
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ATtiny44 Datasheet(HTML) 38 Page - ATMEL Corporation |
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38 / 236 page  38 8006H–AVR–10/09 ATtiny24/44/84 • Bit 2 – PRTIM0: Power Reduction Timer/Counter0 Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0 is enabled, operation will continue like before the shutdown. • Bit 1 – PRUSI: Power Reduction USI Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When waking up the USI again, the USI should be re initialized to ensure proper operation. • Bit 0 – PRADC: Power Reduction ADC Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. The analog comparator cannot be used when the ADC is shut down. |
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