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TL052IP Datasheet(PDF) 32 Page - Texas Instruments

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Part # TL052IP
Description  ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
PDF  65 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TL052IP Datasheet(HTML) 32 Page - Texas Instruments

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TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
32
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC +
VCC –
VI
VO
RL
NOTE A: CL includes fixture capacitance.
CL
(see Note A)
and Overshoot Test Circuit
. Slew Rate, Rise/Fall Time,
Figure 1
Overshoot
10%
90%
tr
Waveform
. Rise Time and Overshoot
Figure 2
VCC –
VCC+
VO
RS
RS
2 k
Ω
. Noise-Voltage Test Circuit
Figure 3
Figure 4
VO
VCC –
VCC +
RL
CL
(see Note A)
VI
10 k
Ω
100
Ω
NOTE A: CL includes fixture capacitance.
Phase-Margin Test Circuit
. Unity-Gain Bandwidth and
typical values
Typical values as presented in this data sheet
represent the median (50% point) of device
parametric performance.
input bias and offset current
At the picoamp-bias-current level typical of the
TL05x and TL05xA, accurate measurement of the
bias current becomes difficult. Not only does this
measurement require a picoammeter, but test
socket leakages can easily exceed the actualdevice bias currents. To accurately measure these small currents,
Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias
voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test
that measures both the socket leakage and the device input bias current is performed. The two measurements
are then subtracted algebraically to determine the bias current of the device.
noise
Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage
density is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meet
specific application requirements. Please contact the factory for details.
Figure 5. Input-Bias and Offset-Current Test Circuit
VCC +
VCC –
Ground Shield
pA
pA



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