TS391 datasheet(3/5 Pages) STMICROELECTRONICS

3 / 5 page

ELECTRICAL CHARACTERISTICS

VCC

+ = +5V, VCC– = 0V, Tamb =25oC (unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Unit

Vio

Input Offset Voltage – (note 2)

Tamb = +25

Tmin.

≤ Tamb ≤ Tmax.

Iib

Input Bias Current – (note 3)

Tamb = +25

Tmin.

≤ Tamb ≤ Tmax.

250

400

Iio

Input Offset Current

Tamb = +25

Tmin.

≤ Tamb ≤ Tmax.

550

150

Avd

Large Signal Voltage Gain

VCC = 15V, RL =15k

Ω,Vo = 1 to 11V

200

V/mV

ICC

Supply Current

VCC =

5V, no load

VCC = 30V, no load

0.2

0.5

1.25

Vicm

Input Common Mode Voltage Range - (note 4)

Tamb = +25

Tmin.

≤ Tamb ≤ Tmax.

VCC

+ -1.5

VCC

+ -2

Vid

Differential Input Voltage - (note 6)

VCC

Isink

Output Sink Current

(Vid = -1V, VO = 1.5V)

VOL

Low Level Output Voltage

(Vid = -1V, Isink = 4mA)

Tamb =25

Tmin.

≤ Tamb ≤ Tmax

250

400

700

IOH

High Level Output Current

(Vid = 1V, VCC =VO = 30V)

Tamb =25

Tmin.

≤ Tamb ≤ Tmax

0.1

µA

tre

Response Time

(RL = 5.1k

Ω to VCC+) – (note 5)

1.3

µs

trel

Large Signal Response Time

(Vi =TTL, Vref = +1.4 V, RL = 5.1k

Ω to VCC+)

300

No tes : 2. At output sw it ch point, VO

≈ 1.4V, RS =0Ω with VCC+ from 5V to 30V and over the full input common-mode range

(0V to VCC

+ 1.5V).

3. T he direction of the input cur rent is out of the IC due t o the PNP input stage. This cur rent is essenti ally constant,

i ndependent of the state of the output, so no loading charge exists on the reference or input l ines.

4. T he input common-mode voltage of either i nput signal volt age should not be allow ed to go negati ve by more than

0.3V.

T he upper end of the common-mode voltage range i s VCC

+ –1.5V, but either or both inputs can go to +30V without

damage.

5. T he response time specifi ed is for a 100mV input step wi th 5mV overdr ive. F or lar ger overdrive signals 300ns can

be obtained.

6. Positive excursions of input volt age may exceed the power suppl y level. As long as the other voltage remains wit hin

the common-mode range the comparat or wi ll provi de a proper output state. The l ow input vol tage st ate must not

be l ess than –0.3V (or 0.3V below the negative power supply, if used).

TS391

3/5

TS391 Datasheet(PDF) 3 Page - STMicroelectronics

TS391 Datasheet(HTML) 3 Page - STMicroelectronics

Html Pages

1 2 3 4 5

Datasheet Download

Link URL