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M38C30ECMXXXFS Datasheet(PDF) 61 Page - Renesas Technology Corp

Part # M38C30ECMXXXFS
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  224 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38C30ECMXXXFS Datasheet(HTML) 61 Page - Renesas Technology Corp

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1-46
38C3 Group User’s Manual
HARDWARE
FUNCTIONAL DESCRIPTION SUPPLEMENT
Interrupt
38C3 group permits interrupts on the basis of 16 sources.
It is vector interrupts with a fixed priority system. Accordingly, when
two or more interrupt requests occur during the same sampling, the
Table 14 Interrupt sources, vector addresses and interrupt priority
FUNCTIONAL DESCRIPTION SUPPLEMENT
higher-priority interrupt is accepted first. This priority is determined
by hardware, but various priority processing can be performed by
software, using an interrupt enable bit and an interrupt disable flag.
For interrupt sources, vector addresses and interrupt priority, refer to
Table 14.
Interrupt Source
Reset (Note 2)
INT0
INT1
INT2
Serial I/O
Timer A
Timer 1
Timer 2
Timer 3
Timer 4
Timer 5
Timer 6
CNTR0
CNTR1
Key input (Key-
on wake-up)
A-D conversion
BRK instruction
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Vector Addresses (Note 1)
High
FFFD16
FFFB16
FFF916
FFF716
FFF516
FFF316
FFF116
FFEF16
FFED16
FFEB16
FFE916
FFE716
FFE516
FFE316
FFE116
FFDF16
FFDD16
Interrupt Request
Generating Conditions
At reset
At detection of either rising or falling edge
of INT0 input
At detection of either rising or falling edge
of INT1 input
At detection of either rising or falling edge
of INT2 input
At completion of serial I/O data transmit/re-
ceive
At timer A underflow
At timer 1 underflow
At timer 2 underflow
At timer 3 underflow
At timer 4 underflow
At timer 5 underflow
At timer 6 underflow
At detection of either rising or falling edge
of CNTR0 input
At detection of either rising or falling edge
of CNTR1 input
At falling of port P8 (at input) input logical
level AND
At completion of A-D conversion
At BRK instruction execution
Remarks
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O is selected
STP release timer underflow
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(falling valid)
Valid when A-D conversion interrupt is
selected
Non-maskable software interrupt
Low
FFFC16
FFFA16
FFF816
FFF616
FFF416
FFF216
FFF016
FFEE16
FFEC16
FFEA16
FFE816
FFE616
FFE416
FFE216
FFE016
FFDE16
FFDC16
Notes 1: Vector addresses contain interrupt jump destination addresses.
2: Reset function in the same way as an interrupt with the highest priority.



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