M30620FCAFP datasheet(427/615 Pages) RENESAS

427 / 615 page

A-D Converter

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-110

2.7 A-D Converter Usage

Frequency selection bit 0

A-D converter's operation clock

Min. conversion

cycles (Note 1)

Min. conversion

time (Note 2)

8-bit mode

10-bit mode

φAD =

fAD

φAD =

fAD

28 X

φAD

33 X

φAD

11.2µs

13.2µs

6.6µs

5.6µs

Frequency selection bit 1

Invalid

φAD = fAD

2.8µs

3.3µs

Table 2.7.1. Conversion time every operation clock

Note 1: The number of conversion cycles per one analog input pin.

Note 2: The conversion time per one analog input pin (when fAD = f(XIN) = 10 MHz)

2.7.1 Overview of the A-D converter usage

The A-D converter used in the M16C/62A group operates on a successive conversion basis. The follow-

ing is an overview of the A-D converter usage.

(1) Mode

The A-D converter operates in one of five modes:

(a) One-shot mode

Carries out A-D conversion on input level of one specified pin only once.

(b) Repetition mode

Repeatedly carries out A-D conversion on input level of one specified pin.

Carries out A-D conversion on input level of two or more specified pins only once.

(d) Repeated sweep mode 0

Repeatedly carries out A-D conversion on input level of two or more pins.

(e) Repeated sweep mode 1

Repeatedly carries out A-D conversion on input level of two or more pins. This mode is different from

the repeated sweep mode 0 in that weights can be assigned to specifing pins control the number of

conversion times.

(2) Operation clock

The operation clock in 5 V operation can be selected from the following: fAD, divide-by-2 fAD, and

divide-by-4 fAD. In 3 V operation, the selection is divide-by-2 fAD or divide-by-4. The fAD frequency is

equal to that of the CPU’s main clock.

(3) Conversion time

Number of conversion for A-D convertor varies depending on resolution as given. Table 2.7.1 shows

relation between the A-D converter operation clock and conversion time.

Sample & Hold function selected:

φAD cycles for 10-bit resolution, or 28 φAD cycles for 8-bit resolution

No Sample & Hold function:

φAD cycles for 10-bit resolution, or 49 φAD cycles for 8-bit resolution

M30620FCAFP Datasheet(PDF) 427 Page - Renesas Technology Corp

M30620FCAFP Datasheet(HTML) 427 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL