M30620ECFS datasheet(96/621 Pages) RENESAS

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Mitsubishi microcomputers

M16C / 62 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

DMAC

DMA enable bit

Setting the DMA enable bit to "1" makes the DMAC active. The DMAC carries out the following operations

at the time data transfer starts immediately after DMAC is turned active.

(1) Reloads the value of one of the source pointer and the destination pointer - the one specified for the

forward direction - to the forward direction address pointer.

(2) Reloads the value of the transfer counter reload register to the transfer counter.

Thus overwriting "1" to the DMA enable bit with the DMAC being active carries out the operations given

above, so the DMAC operates again from the initial state at the instant "1" is overwritten to the DMA

enable bit.

DMA request bit

The DMAC can generate a DMA transfer request signal triggered by a factor chosen in advance out of

DMA request factors for each channel.

DMA request factors include the following.

* Factors effected by using the interrupt request signals from the built-in peripheral functions and software

DMA factors (internal factors) effected by a program.

* External factors effected by utilizing the input from external interrupt signals.

For the selection of DMA request factors, see the descriptions of the DMAi factor selection register.

The DMA request bit turns to "1" if the DMA transfer request signal occurs regardless of the DMAC's state

(regardless of whether the DMA enable bit is set "1" or to "0"). It turns to "0" immediately before data

transfer starts.

In addition, it can be set to "0" by use of a program, but cannot be set to "1".

There can be instances in which a change in DMA request factor selection bit causes the DMA request bit

to turn to "1". So be sure to set the DMA request bit to "0" after the DMA request factor selection bit is

changed.

The DMA request bit turns to "1" if a DMA transfer request signal occurs, and turns to "0" immediately

before data transfer starts. If the DMAC is active, data transfer starts immediately, so the value of the

DMA request bit, if read by use of a program, turns out to be "0" in most cases. To examine whether the

DMAC is active, read the DMA enable bit.

Here follows the timing of changes in the DMA request bit.

(1) Internal factors

Except the DMA request factors triggered by software, the timing for the DMA request bit to turn to "1" due

to an internal factor is the same as the timing for the interrupt request bit of the interrupt control register to

turn to "1" due to several factors.

Turning the DMA request bit to "1" due to an internal factor is timed to be effected immediately before the

transfer starts.

(2) External factors

An external factor is a factor caused to occur by the leading edge of input from the INTi pin (i depends on

which DMAC channel is used).

Selecting the INTi pins as external factors using the DMA request factor selection bit causes input from

these pins to become the DMA transfer request signals.

The timing for the DMA request bit to turn to "1" when an external factor is selected synchronizes with the

signal's edge applicable to the function specified by the DMA request factor selection bit (synchronizes

with the trailing edge of the input signal to each INTi pin, for example).

With an external factor selected, the DMA request bit is timed to turn to "0" immediately before data

transfer starts similarly to the state in which an internal factor is selected.

M30620ECFS Datasheet(PDF) 96 Page - Renesas Technology Corp

M30620ECFS Datasheet(HTML) 96 Page - Renesas Technology Corp

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