Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

H8SX1663 Datasheet(PDF) 829 Page - Renesas Technology Corp

Part # H8SX1663
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 Datasheet(HTML) 829 Page - Renesas Technology Corp

Back Button H8SX1663 Datasheet HTML 825Page - Renesas Technology Corp H8SX1663 Datasheet HTML 826Page - Renesas Technology Corp H8SX1663 Datasheet HTML 827Page - Renesas Technology Corp H8SX1663 Datasheet HTML 828Page - Renesas Technology Corp H8SX1663 Datasheet HTML 829Page - Renesas Technology Corp H8SX1663 Datasheet HTML 830Page - Renesas Technology Corp H8SX1663 Datasheet HTML 831Page - Renesas Technology Corp H8SX1663 Datasheet HTML 832Page - Renesas Technology Corp H8SX1663 Datasheet HTML 833Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 829 / 1158 page
background image
Section 16 USB Function Module (USB)
Rev.1.00 Jun. 07, 2006 Page 777 of 1102
REJ09B0294-0100
Bit
Bit Name
Initial
Value
R/W
Description
7
6
5
0
0
0
R
R
R
Reserved
These bits are always read as 0. The write value
should always be 0.
4
RWUPS
0
R
Remote Wakeup Status
This status bit indicates remote wakeup command
from USB host is enabled or disabled.
This bit is set to 0 when remote wakeup command
from UBM host is disabled by
Device_Remote_Wakeup due to Set Feature or Clear
Feature request. This bit is set to 1 when remote
wakeup command is enabled.
3
RSME
0
R/W
Resume Enable
This bit releases the suspend state (or executes
remote wakeup). When RSME is set to 1, resume
request starts. If RSME is once set to 1, clear this bit
to 0 again afterwards. In this case, the value 1 set to
RSME must be kept for at least one clock period of
12-MHz clock.
2
PWMD
0
R/W
Bus Power Mode
This bit specifies the USB power mode. When PWMD
is set to 0, the self-power mode is selected for this
module. When set to 1, the bus-power mode is
selected.
1
ASCE
0
R/W
Automatic Stall Clear Enable
Setting the ASCE bit to 1 automatically clears the stall
setting bit (the EPxSTL (x
= 1, 2, or 3) bit in EPSTLR0
or EPSTR1) of the end point that has returned the
stall handshake to the host. The automatic stall clear
enable is common to the all end points. Thus the
individual control of the end point is not possible.
When the ASCE bit is set to 0, the stall setting bit is
not automatically cleared. This bit must be released
by the users. To enable this bit, make sure that the
ASCE bit should be set to 1 before the EPxSTL (x
= 1,
2, or 3) bit in EPSTL is set to 1.
0
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com