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H8SX1663 Datasheet(PDF) 828 Page - Renesas Technology Corp

Part # H8SX1663
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 Datasheet(HTML) 828 Page - Renesas Technology Corp

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Section 16 USB Function Module (USB)
Rev.1.00 Jun. 07, 2006 Page 776 of 1102
REJ09B0294-0100
16.3.23
Configuration Value Register (CVR)
This register stores the Configuration, Interface, or Alternate set value when the Set Configuration
or Set Interface command from the host is correctly received.
Bit
Bit Name
Initial Value
R/W
7
CNFV1
0
R
6
CNFV0
0
R
5
INTV1
0
R
4
INTV0
0
R
3
0
R
2
ALTV2
0
R
1
ALTV1
0
R
0
ALTV0
0
R
Bit
Bit Name
Initial
Value
R/W
Description
7
6
CNFV1
CNFV0
All 0
R
These bits store Configuration Setting value when
they receive Set Configuration command. CNFV is
updated when the SETC bit in IFR2 is set to 1.
5
4
INTV1
INTV0
All 0
R
These bits store Interface Setting value when they
receive Set Interface command. INTV is updated
when the SETI bit in IFR2 is set to 1.
3
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
2
ALTV2
0
R
1
ALTV1
0
R
0
ALTV0
0
R
These bits store Alternate Setting value when they
receive Set Interface command. ALTV2 to ALTV0 are
updated when the SETI bit in IFR2 is set to 1.
16.3.24
Control Register (CTLR)
This register sets functions for bits ASCE, PWMD, RSME, and, PWUPS.
Bit
Bit Name
Initial Value
R/W
7
0
R
6
0
R
5
0
R
4
RWUPS
0
R
3
RSME
0
R/W
2
PWMD
0
R/W
1
ASCE
0
R/W
0
0
R



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