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H8SX1663 Datasheet(PDF) 793 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 793 Page - Renesas Technology Corp |
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793 / 1158 page ![]() Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 741 of 1102 REJ09B0294-0100 15.10.7 SCI Operations during Power-Down State Transmission: Before specifying the module stop state or making a transition to software standby mode, stop the transmit operations (TE = TIE = TEIE = 0). TSR, TDR, and SSR are reset. The states of the output pins in the module stop state or in software standby mode depend on the port settings, and the pins output a high-level signal after cancellation. If the transition is made during data transmission, the data being transmitted will be undefined. To transmit data in the same transmission mode after cancellation of the power-down state, set the TE bit to 1, read SSR, write to TDR, clear TDRE in this order, and then start transmission. To transmit data in a different transmission mode, initialize the SCI first. Figure 15.39 shows a sample flowchart for transition to software standby mode during transmission. Figures 15.40 and 15.41 show the port pin states during transition to software standby mode. Before specifying the module stop state or making a transition to software standby mode from the transmission mode using DTC transfer, stop all transmit operations (TE = TIE = TEIE = 0). Setting the TE and TIE bits to 1 after cancellation sets the TXI flag to start transmission using the DTC. Reception: Before specifying the module stop state or making a transition to software standby mode, stop the receive operations (RE = 0). RSR, RDR, and SSR are reset. If transition is made during data reception, the data being received will be invalid. To receive data in the same reception mode after cancellation of the power-down state, set the RE bit to 1, and then start reception. To receive data in a different reception mode, initialize the SCI first. For using the IrDA function, set the IrE bit in addition to setting the RE bit. Figure 15.42 shows a sample flowchart for mode transition during reception. |
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