HD6432138SW datasheet(231/1061 Pages) RENESAS

Part #	HD6432138SW

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 7 Data Transfer Controller [H8S/2138 Group]

Rev. 4.00 Jun 06, 2006 page 177 of 1004

REJ09B0301-0400

7.3.6

Repeat Mode

In repeat mode, one operation transfers one byte or one word of data.

From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the

initial address register state specified by the transfer counter and repeat area resumes and transfer

is repeated. In repeat mode the transfer counter does not reach H'00, and therefore CPU interrupts

cannot be requested when DISEL = 0.

Table 7.6 lists the register information in repeat mode and figure 7.7 shows memory mapping in

repeat mode.

Table 7.6

Name

Abbreviation

Function

DTC source address register

SAR

Transfer source address

DTC destination address register

DAR

Transfer destination address

DTC transfer count register AH

CRAH

Holds number of transfers

DTC transfer count register AL

CRAL

Transfer count

DTC transfer count register B

CRB

Not used

Transfer

Repeat area

SAR or

DAR

DAR or

SAR

Figure 7.7 Memory Mapping in Repeat Mode

HD6432138SW Datasheet(PDF) 231 Page - Renesas Technology Corp