HD6432138SW datasheet(191/1061 Pages) RENESAS

Part #	HD6432138SW

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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191 / 1061 page

Section 6 Bus Controller

Rev. 4.00 Jun 06, 2006 page 137 of 1004

REJ09B0301-0400

Section 6 Bus Controller

6.1

Overview

The H8S/2138 Group and H8S/2134 Group have an on-chip bus controller (BSC) that allows

external address space bus specifications, such as bus width and number of access states, to be set.

The bus controller also has a bus arbitration function, and controls the operation of the internal bus

masters: the CPU and data transfer controller (DTC).

6.1.1

Features

The features of the bus controller are listed below.

• Basic bus interface

 2-state access or 3-state access can be selected

 Program wait states can be inserted

• Burst ROM interface

 External space can be designated as ROM interface space

 1-state or 2-state burst access can be selected

• Idle cycle insertion

 An idle cycle can be inserted when an external write cycle immediately follows an external

read cycle

• Bus arbitration function

 Includes a bus arbiter that arbitrates bus mastership between the CPU and DTC

HD6432138SW Datasheet(PDF) 191 Page - Renesas Technology Corp