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HD6432138SW Datasheet(PDF) 136 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 136 Page - Renesas Technology Corp |
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136 / 1061 page ![]() Section 3 MCU Operating Modes Rev. 4.00 Jun 06, 2006 page 82 of 1004 REJ09B0301-0400 Mode 3/EXPE = 0 (normal single-chip mode) H'0000 H'DFFF H'0000 H'DFFF H'0000 External address space On-chip ROM External address space On-chip ROM Mode 3/EXPE = 1 (normal expanded mode with on-chip ROM enabled) Mode 1 (normal expanded mode with on-chip ROM disabled) H'EFFF H'E080 H'EFFF H'E080 H'FEFF H'FFFF H'FE50 H'FF7F H'FF80 H'FF00 Internal I/O registers 2 On-chip RAM* Internal I/O registers 1 H'EFFF On-chip RAM* On-chip RAM H'E080 H'FEFF H'FFFF H'FE50 H'FE4F H'F800 H'FE4F H'F800 H'FF7F H'FF80 H'FF00 On-chip RAM (128 bytes)* External address space Internal I/O registers 2 Internal I/O registers 1 On-chip RAM (128 bytes)* External address space Reserved area Reserved area Internal I/O registers 2 Internal I/O registers 1 On-chip RAM (128 bytes) H'FEFF H'FFFF H'FE50 H'FF7F H'FF80 H'FF00 Note: * External addresses can be accessed by clearing the RAME bit in SYSCR to 0. Figure 3.2 H8S/2138 F-ZTAT A-Mask Version Memory Map in Each Operating Mode |
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