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HD6432138SW Datasheet(PDF) 975 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 975 Page - Renesas Technology Corp |
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975 / 1061 page ![]() Appendix B Internal I/O Registers Rev. 4.00 Jun 06, 2006 page 921 of 1004 REJ09B0301-0400 ICMR1—I 2C Bus Mode Register 1 H'FF8F IIC1 ICMR0—I 2C Bus Mode Register 0 H'FFDF IIC0 7 MLS 0 R/W 6 WAIT 0 R/W 5 CKS2 0 R/W 4 CKS1 0 R/W 3 CKS0 0 R/W 0 BC0 0 R/W 2 BC2 0 R/W 1 BC1 0 R/W Bit Initial value Read/Write Bit counter BC2 BC1 0 1 0 1 0 1 BC0 0 1 0 1 0 1 0 1 Note: * Do not set this bit to 1 when the I2C bus format is used. Synchronous serial format 8 1 2 3 4 5 6 7 I2C bus format 9 2 3 4 5 6 7 8 Serial clock select CKS2 CKS1 0 1 0 1 0 1 0 1 0 1 0 1 CKS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 IICX 0 1 Clock φ/28 φ/40 φ/48 φ/64 φ/80 φ/100 φ/112 φ/128 φ/56 φ/80 φ/96 φ/128 φ/160 φ/200 φ/224 φ/256 Wait insertion bit 0 Data and acknowledge bits transferred consecutively 1 Wait inserted between data and acknowledge bits MSB-first/LSB-first select* 0 MSB-first 1 LSB-first |
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