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HD6432138SW Datasheet(PDF) 620 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 620 Page - Renesas Technology Corp |
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620 / 1061 page  Section 19 A/D Converter Rev. 4.00 Jun 06, 2006 page 566 of 1004 REJ09B0301-0400 (1) (2) tD tSPL tCONV φ Address Write signal Input sampling timing ADF Legend: (1): ADCSR write cycle (2): ADCSR address tD: A/D conversion start delay tSPL: Input sampling time tCONV: A/D conversion time Figure 19.5 A/D Conversion Timing Table 19.4 A/D Conversion Time (Single Mode) CKS = 0 CKS = 1 Item Symbol Min Typ Max Min Typ Max A/D conversion start delay t D 10 — 17 6 — 9 Input sampling time t SPL — 63 —— 31 — A/D conversion time t CONV 259 — 266 131 — 134 Note: Values in the table are the number of states. |
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