HD6432138SW datasheet(610/1061 Pages) RENESAS

610 / 1061 page

Section 19 A/D Converter

Rev. 4.00 Jun 06, 2006 page 556 of 1004

REJ09B0301-0400

19.2.2

A/D Control/Status Register (ADCSR)

ADF

R/(W)*

ADIE

R/W

ADST

R/W

SCAN

R/W

CKS

R/W

CH0

R/W

CH2

R/W

CH1

R/W

Bit

Initial value

Read/Write

Note: * Only 0 can be written in bit 7, to clear the flag.

ADCSR is an 8-bit readable/writable register that controls A/D conversion operations.

ADCSR is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode,

subsleep mode, and module stop mode.

Bit 7—A/D End Flag (ADF): Status flag that indicates the end of A/D conversion.

Bit 7

ADF

Description

[Clearing conditions]

(Initial value)

• When 0 is written in the ADF flag after reading ADF = 1

• When the DTC is activated by an ADI interrupt and ADDR is read

[Setting conditions]

• Single mode: When A/D conversion ends

• Scan mode: When A/D conversion ends on all specified channels

Bit 6—A/D Interrupt Enable (ADIE): Selects enabling or disabling of interrupt (ADI) requests

at the end of A/D conversion.

Bit 6

ADIE

Description

A/D conversion end interrupt (ADI) request is disabled

(Initial value)

A/D conversion end interrupt (ADI) request is enabled

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