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HD6432138SW Datasheet(PDF) 603 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 603 Page - Renesas Technology Corp |
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603 / 1061 page ![]() Section 18 D/A Converter Rev. 4.00 Jun 06, 2006 page 549 of 1004 REJ09B0301-0400 18.3 Operation The D/A converter module has two on-chip D/A converter circuits that can operate independently. D/A conversion is performed continuously whenever enabled by the D/A control register (DACR). When a new value is written in DADR0 or DADR1, conversion of the new value begins immediately. The converted result is output by setting the DAOE0 or DAOE1 bit to 1. An example of conversion on channel 0 is given next. Figure 18.2 shows the timing. • Software writes the data to be converted in DADR0. • D/A conversion begins when the DAOE0 bit in DACR is set to 1. After the elapse of the conversion time, analog output appears at the DA0 pin. Output of the converted result begins after the conversion time. The output value is AVcc × (DADR value)/256. • This output continues until a new value is written in DADR0 or the DAOE0 bit is cleared to 0. • If a new value is written in DADR0, conversion begins immediately. Output of the converted result begins after the conversion time. • When the DAOE0 bit is cleared to 0, DA0 becomes an input pin. DADR0 write cycle DACR write cycle DADR0 write cycle DACR write cycle Address φ DADR0 DAOE0 DA0 Conversion data (1) Conversion data (2) High-impedance state Conversion result (1) Conversion result (2) t DCONV t DCONV Legend: t : D/A conversion time DCONV Figure 18.2 D/A Conversion (Example) |
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