HD6432138SW datasheet(504/1061 Pages) RENESAS

504 / 1061 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 4.00 Jun 06, 2006 page 450 of 1004

REJ09B0301-0400

15.4

SCI Interrupts

The SCI has four interrupt sources: the transmit-end interrupt (TEI) request, receive-error interrupt

(ERI) request, receive-data-full interrupt (RXI) request, and transmit-data-empty interrupt (TXI)

request. Table 15.13 shows the interrupt sources and their relative priorities. Individual interrupt

sources can be enabled or disabled with the TIE, RIE, and TEIE bits in SCR. Each kind of

interrupt request is sent to the interrupt controller independently.

When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag

in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DTC to

perform data transfer. The TDRE flag is cleared to 0 automatically when data transfer is

performed by the DTC. The DTC cannot be activated by a TEI interrupt request.

When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,

PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt can

activate the DTC to perform data transfer. The RDRF flag is cleared to 0 automatically when data

transfer is performed by the DTC. The DTC cannot be activated by an ERI interrupt request.

Table 15.13 SCI Interrupt Sources

Channel

Interrupt

Source

Description

DTC Activation

Priority*

ERI

Receive error (ORER, FER, or PER)

Not possible

High

RXI

Receive data register full (RDRF)

Possible

TXI

Transmit data register empty (TDRE)

Possible

TEI

Transmit end (TEND)

Not possible

ERI

Receive error (ORER, PER, or PER)

Not possible

RXI

Receive data register full (RDRF)

Possible

TXI

Transmit data register empty (TDRE)

Possible

TEI

Transmit end (TEND)

Not possible

ERI

Receive error (ORER, PER, or PER)

Not possible

RXI

Receive data register full (RDRF)

Possible

TXI

Transmit data register empty (TDRE)

Possible

TEI

Transmit end (TEND)

Not possible

Low

Note:

The table shows the initial state immediately after a reset. Relative channel priorities

can be changed by the interrupt controller.

The TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The

TEND flag is cleared at the same time as the TDRE flag. Consequently, if a TEI interrupt and a

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