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HD6432138SW Datasheet(PDF) 384 Page - Renesas Technology Corp |
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HD6432138SW Datasheet(HTML) 384 Page - Renesas Technology Corp |
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384 / 1061 page ![]() Section 12 8-Bit Timers Rev. 4.00 Jun 06, 2006 page 330 of 1004 REJ09B0301-0400 12.3.6 Input Capture Operation TMRX has input capture registers of TICR,TICRR, and TICRF. Narrow pulse width can be measured with TICRR and TICRF, using one capture operation controlled by the ICST bit in the TCONRI register of the timer connection. When TMRIX detects a rising and falling edge successively after the ICST bit has been set to 1, the values of TCNT at that time are transferred to TICRR and TICRF and ICST bit is cleared to 0. The TMRIX input signal can be selected by setting other bits in the TCONRI register. (1) Input capture input timing Figure 12.9 shows the timing of the input capture operation. TCNTX n N + 1 N n + 1 TICRR M n n TICRF m mN φ TMRIX Input capture signal Figure 12.9 Timing of Input Capture Operation If the input capture signal enters while TICRR and TICRF are being read, it is internally delayed one system clock ( φ) period. Figure 12.10 shows the timing of this operation. |
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