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ADE75 Datasheet(PDF) 16 Page - Analog Devices |
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ADE75 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 148 page  ADE75xx/ADE71xx Preliminary Technical Data Rev. PrE | Page 16 of 148 Table 7. SPI SLAVE MODE TIMING (CPHA = 0) Parameter Min Typ Max Unit tSS SS to SCLOCK Edge 0 ns tSL SCLOCK Low Pulse Width 977 ns tSH SCLOCK High Pulse Width 977 ns tDAV Data Output Valid after SCLOCK Edge TBD ns tDSU Data Input Setup Time before SCLOCK Edge TBD ns tDHD Data Input Hold Time after SCLOCK Edge TBD ns tDF Data Output Fall Time 10 25 ns tDR Data Output Rise Time 10 25 ns tSR SCLOCK Rise Time 10 25 ns tSF SCLOCK Fall Time 10 25 ns tDOSS Data Output Valid after SS Edge 20 ns tDIS MISO disable after SS rising edge TBD ns tSFS SS High after SCLOCK Edge 0 ns MISO MOSI SCLOCK (CPOL = 1) SCLOCK (CPOL = 0) SS BITS 6–1 LSB IN t DHD t DSU t DR t DF t DAV t DOSS t SH t SL t SR t SF t SFS MSB IN t SS MSB BITS 6–1 LSB t DIS Figure 7. SPI Slave Mode Timing (CPHA = 0) |
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