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MSS50 Datasheet(PDF) 1 Page - STMicroelectronics |
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MSS50 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 5 page ![]() 1/5 ® MSS40 / 50 Series BACK TO BACK SCR MODULE September 2000 - Ed: 3 MAIN FEATURES: DESCRIPTION Packaged in ISOTOP modules, the MSS40 / MSS50 Series is based on two back-to-back SCR configurations, providing high noise immunity. They are suitable for high power applications such as solid state relays, heating control systems, welding equipment, motor control circuits... The compactness of the ISOTOP package allows high power density and optimized power bus connections. Thanks to their internal ceramic pad, they provide high voltage insulation (2500V RMS), complying with UL standards (File ref: E81734). Symbol Value Unit IT(RMS) 55 and 70 A VDRM/VRRM 800 and 1200 V IGT 50 mA ABSOLUTE RATINGS (limiting values) Symbol Parameter Value Unit MSS40 MSS50 IT(RMS) RMS on-state current Tc = 80 °C 55 A Tc = 85 °C 70 ITSM Non repetitive surge peak on-state current tp = 16.7 ms Tj = 25°C 420 630 A tp = 20 ms 400 600 I ²tI²t Value for fusing tp = 10 ms Tj = 25°C 800 1800 A2S dI/dt Critical rate of rise of on-state current IG = 2 x IGT , tr ≤ 100 ns F = 120 Hz Tj = 125°C 50 A/µs IGM Peak gate current tp = 20 µs Tj = 125°C 4 A PG(AV) Average gate power dissipation Tj = 125°C 1 W Tstg Tj Storage junction temperature range Operating junction temperature range - 40 to + 150 - 40 to + 125 °C VRGM Maximum peak reverse gate voltage 5 V A1 A2 G2 G1 ISOTOP® ISOTOP is a registred trademark of STMicroelectronics PIN CONNECTIONS A1 A2 G1 G2 1: Thyristor 2 Anode (A2) 2: Thyristor 2 Gate (G2) 3: Thyristor 1 Anode (A1) 4: Thyristor 1 Gate (G1) 4 1 3 2 |
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