REF54500CDR datasheet(28/44 Pages) TI2

28 / 44 page

9.2.1.1 Design Requirements

A detailed design procedure is based on a design example. For this design example, use the parameters listed

in Table 9-2 as the input parameters.

Table 9-2. Design Example Parameters

DESIGN PARAMETER

VALUE

Input voltage VIN

Input capacitor

0.1µF

Output capacitor

10µF

9.2.1.2 Detailed Design Procedure

A bulk capacitor (0.1μF to 10μF) must be connected to the supply to improve transient response in the

applications where the supply voltage can fluctuate. Connect an additional 0.1μF capacitor at VIN pin closer

to the device to bypass high frequency supply noise.

A low ESR (maximum 1Ω) capacitor of 1μF to 100μF must be connected to the output to provide stable output.

For very low noise applications, special care must be taken with X7R and other MLCC capacitors due to

piezoelectric effect. Piezoelectric property of multilayer ceramic capacitors (MLCC) can introduce a μV range

noise due to mechanical vibrations, potentially dominating the noise of the REF54. More information on how

the piezoelectric effect can be explored in systems can be found in Stress-induced outbursts: Microphonics in

ceramic capacitors (Part 1) and Stress-induced outbursts: Microphonics in ceramic capacitors (Part 2) . Designer

must use film capacitors for noise sensitive applications. TI recommends placing the REF54 reference as close

to the load as possible to minimize IR drop due to trace resistance.

The transient startup response of the REF54 is shown in Figure 9-2. The startup response of the REF54 family

is dependent on the output and NR pin capacitor. Increasing the output capacitor improves the load transient

performance of the device, however this also increases the startup time. Figure 9-3 shows the startup time with

CNR = 10μF, increases to 3seconds.

9.2.1.3 Application Curves

1 ms/div

VIN

VREF

Figure 9-2. REF54250CDR Startup Response

(COut= 10uF, CNR= Open)

1 s/div

VIN

VREF

Figure 9-3. REF54250CDR Startup Response

(COut= 10uF, CNR= 10uF )

9.2.2 Reference Attach With High Precision ADC

High precision ADCs require external precision voltage references to achieve the best SNR and gain drift with

temperature and time. REF54 has flat dynamic impedance at lower frequency. However the dynamic impedance

increases for higher sampling rate. A low noise, low offset buffer with good bandwidth helps to improve THD

and droop performance to achieve > 18bit ENOB at higher sampling rate. Figure 9-4 shows evaluation circuit

for ADS1285. Figure 9-5 and Figure 9-6 show the peak to peak code variation for constant DC input of 0V and

2.0796V respectively. The performance meets data sheet specifications of ADS1285 with REF54.

REF54

SNVSCN7D – NOVEMBER 2023 – REVISED JUNE 2026

www.ti.com

Submit Document Feedback

Product Folder Links: REF54

REF54500CDR Datasheet(PDF) 28 Page - Texas Instruments

REF54500CDR Datasheet(HTML) 28 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Download

Link URL