Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

STPM12 Datasheet(PDF) 33 Page - STMicroelectronics

Part # STPM12
Description  Single phase energy metering IC with pulsed output and digital calibration
PDF  46 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPM12 Datasheet(HTML) 33 Page - STMicroelectronics

Back Button STPM12 Datasheet HTML 29Page - STMicroelectronics STPM12 Datasheet HTML 30Page - STMicroelectronics STPM12 Datasheet HTML 31Page - STMicroelectronics STPM12 Datasheet HTML 32Page - STMicroelectronics STPM12 Datasheet HTML 33Page - STMicroelectronics STPM12 Datasheet HTML 34Page - STMicroelectronics STPM12 Datasheet HTML 35Page - STMicroelectronics STPM12 Datasheet HTML 36Page - STMicroelectronics STPM12 Datasheet HTML 37Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 46 page
background image
STPM11, STPM12, STPM13, STPM14
Theory of operation
Doc ID 13167 Rev 8
33/46
Permanent writing of the CFG bits
In order to make a permanent set of some CFG bits, use the following procedure:
1. collect all addresses of CFG bits to be permanently set into a list;
2. clear all OTP shadow latches;
3. set the system signal RD;
4. connect a current source of at least +14 V, 1 mA to 3 mA to VOTP;
5. wait for VOTP voltage to be stable;
6. set one OTP shadow latch from the list;
7. set the system signal WE;
8. wait for 300 s;
9. clear the system signal WE;
10. clear the OTP shadow latch which was set in step 6;
11. until all CFG bits are permanently set as desired, repeat steps 5 to 11;
12. disconnect the current source;
13. wait for VOTP voltage to be less than 3 V;
14. clear the system signal RD;
15. verify the correct writing, testing STPM1x operation;
16. if the verification of CFG bits fails, repeat steps 1 to 16.
For steps of set or clear, apply the timing shown in Figure 21 - with proper signal on the
SDA-TD.
In order to create a permanent set of the TSTD bit, which does not result in any more writing
to the Configuration bits, the procedure above must be conducted in such a way that steps 6
to 13 are performed in series during a single period of active SCS. The idle state of SCS
would make the signal TSTD immediately effective which in turn, would abort the procedure
and possibly destroy the device due to clearing of system signal RD. This would result in the
connecting of all gates of 3 V NMOS sense amplifiers of already permanently set CFG bits
to the VOTP source.
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com