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PL135-27GI-R Datasheet(PDF) 4 Page - Micrel Semiconductor |
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PL135-27GI-R Datasheet(HTML) 4 Page - Micrel Semiconductor |
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4 / 5 page ![]() Micrel, Inc. PL135-27 September 8, 2014 4 Revision 2.0 Layout Recommendations The following guidelines are to assist you with a performance optimized PCB design: Signal Integrity and Termination Considerations • Keep traces short. • Trace = Inductor. With a capacitive load this equals ringing. • Long trace = Transmission Line. Without proper termination this will cause reflections (looks like ringing). • Design long traces as “striplines” or “microstrips” with defined impedance. • Match trace at one side to avoid reflections bouncing back and forth. Decoupling and Power Supply Considerations • Place decoupling capacitors as close as possible to the VDD pin(s) to limit noise from the power supply • Multiple VDD pins should be decoupled separately for best performance. • Addition of a ferrite bead in series with VDD can help prevent noise from other board sources • Value of decoupling capacitor is frequency dependent. Typical value to use is 0.1µF. |
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