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74AC273 Datasheet(PDF) 1 Page - STMicroelectronics |
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74AC273 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 11 page  1/11 April 2001 s HIGH SPEED: s fMAX = 250MHz (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =8µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH =VNIL =28 % VCC (MIN.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74AC273 is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Information signals applied to D inputs are transfered to the Q output on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independentely of the other inputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP 74AC273B SOP 74AC273M 74AC273MTR TSSOP 74AC273TTR TSSOP DIP SOP |
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